Patent application US 2003/0132809 discloses a circuit for a real time clock of a computer. Typically, in the known circuit, all the components and in particular the volatile storage unit, are powered through a common supply line.
In situations where power consumption should be kept lowest possible, the power supply line of the circuit is cut off to save energy during the sleep mode. However, in the known circuit, the setting stored in the volatile storage unit is lost when the supply line is cut off. As a result, it is necessary to reload the setting in the volatile storage unit when the power is restored. Reloading the setting in the volatile storage unit each time the power is restored is a cumbersome process.